From 08c6c1bdcd8d96ec72eeb9c3ee3a95299b897362 Mon Sep 17 00:00:00 2001
From: Joel Grunbaum <joelgrun@gmail.com>
Date: Mon, 06 Dec 2021 07:34:22 +0000
Subject: [PATCH] Enable verilog-mode
---
config.org | 12 +++++++-----
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/config.org b/config.org
index 1c1bf9c..54db705 100644
--- a/config.org
+++ b/config.org
@@ -1128,10 +1128,13 @@
:ensure t
:init
(cond ((eq system-type 'windows-nt)
- (setq plantuml-jar-path "c:/ProgramData/chocolatey/lib/plantuml/tools/plantuml.jar"))
+ (when (file-exists-p "c:/ProgramData/chocolatey/lib/plantuml/tools/plantuml.jar")
+ (setq plantuml-jar-path "c:/ProgramData/chocolatey/lib/plantuml/tools/plantuml.jar")
+ (setq planuml-default-exec-mode 'jar)))
((eq system-type 'gnu/linux)
- (setq plantuml-jar-path "/usr/share/java/plantuml/plantuml.jar")))
- (setq planuml-default-exec-mode 'jar))
+ (when (file-exists-p "/usr/share/java/plantuml/plantuml.jar")
+ (setq plantuml-jar-path "/usr/share/java/plantuml/plantuml.jar")
+ (setq planuml-default-exec-mode 'jar)))))
#+END_SRC
*** COMMENT Racket
@@ -1151,7 +1154,7 @@
'("\\.rkt$" . racket-mode)))
#+END_SRC
-*** COMMENT Verilog
+*** Verilog
**** Get latest version
Use latest version from repositories.
#+BEGIN_SRC emacs-lisp
@@ -1304,7 +1307,6 @@
(scheme . t)
(gnuplot . t)
(matlab . t)
- (plantuml . t)
(fortran . t)
(java . t)
(plantuml . t)))
--
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